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Islands are great for vacations but not for data storage

 

By Vish Mulchand, Senior Director of Product Management and Marketing, HP Storage

 

BeachScene.jpg

 

 

 

The islands. Ah yes. . . brilliant sunshine skipping off sparklin sapphire waters, freckled  white sands, hot and lazy afternoons, ice-cold pineapple rum… 

 

 

 

 

Here in my last video blog with HPStorageGuy Calvin Zito, I talked about the beauty of the islands and why islands are great for vacations—but not for storage. I talked about how flash is disruptive. And how, depending on your starting point, to take advantage of flash, you are forced to choose between adding yet another storage silo to your infrastructure, or, worst yet, be faced with replacing all your storage.

 

 

This leads to my question for this 3PAR ThursdayWhat if you had an existing storage infrastructure that allows you to adopt flash or other forms of solid-state technology when it becomes available, yet still deliver the disruptive benefits that this new technology brings?

 

In this way, you can avoid risk, avoid tradeoffs and get a continuum in performance/cost/data services vectors. All delivered across several design centers—HDD storage, auto-tiered with SSDs, all-flash array, flash as a storage cache, tiering flash arrays with read/write differentiation and next-generation solid-state technologies. So you can adopt flash as and when you are ready without a rip and replace of your current infrastructure.

 

How is it possible? Is it even doable technically?

The answer in many instances is yes: it has been done and if you start with the correct mindset and build products based on the right fundamental architectural principles, you can bridge through multiple media transitions. Look at the proof points. Start with the 3PAR StoreServ family. It’s a flash optimized family—with flash optimizations developed on a common operating environment and deployed across high-end, midrange and low-end arrays. The all-flash HP 3PAR StoreServ 7450 delivers 900,000 IOPs of performance, supports capacity efficiency technologies like inline deduplication and adaptive sparing, provides a rich set of data services like replication, snapshots and priority optimization and allows data mobility with a federated storage architecture. You can trace all of this capabilities and more back to 3PAR architecture.

 

Ready to dive deeper on 3PAR architecture?

The 3PAR architecture consists of three fundamental tenets:

  • Multi-controller scalability
  • A dedicated, storage-specialized ASIC
  • A 3-layer, fine-grained virtualized operating system

And three key applications of these tenets:

  • Mesh-active, clustered systems
  • System-wide striping
  • Handling mixed workloads

Let’s explore each of these tenets in detail.

  • Multi-controller scalability: Many storage architectures are based on a dual-controller design where a portion of the array is assigned to each controller. While this approach worked in the client-server era with modular storage matched to the distributed nature of computing, dual-controller designs are fundamentally flawed in the current flash era because flash system performance is a function of controller performance, not number of spindles or disks. 3PAR arrays were architected from day one to scale from 2-to-8 controllers as well as scale to multiple processors per controller. This multi-controller and multi-processor approach allows a 3PAR array scalable performance by adding controllers in a modular fashion. This approach also has resiliency benefits that allow an array to gracefully recover from a controller failure. Traditional arrays—and even modern flash arrays based on dual controller architectures—are by architectural design antiquated. How can a dual controller array hope to function effectively as flash performance increases over time?
  • Dedicated storage specialized ASIC: The Pareto principle, which states that typically 20% of the resources drive 80% of the benefit, is widely used in the computer industry. The 3PAR Gen4 ASIC, which is specialized hardware deployed in the array, is no exception. The ASIC was developed looking at the 20% of operations that drive 80% of the storage array activity, and then optimizing that 20% in hardware for demon-like speed. Functions like capacity reclamation, deduplication and data movement between controllers—fundamental in a flash array—can be accelerated in hardware to match the speeds of flash. You only need look at how a NetApp FAS or VNX array implements deduplication to realize that the approach taken there is far too inefficient and time consuming to work in a modern flash array. Not only is deduplication a post process rather than inline operation in these older arrays, the function also taxes the controller CPUs and impedes the same performance acceleration you are trying to get with flash in the first place. Equally astounding is how many modern all-flash arrays designed from the ground up still use a dual-controller design and use the controller CPU to do functions like deduplication and pattern detection removal.
  • 3-layer, fine-grained virtualized operating system: Flash media is fast. Arrays handling this media need to treat flash differently from traditional spinning media. One difference is capacity consumed for each write. (Think sipping versus gulping that ice-cold pineapple rum.) Many older arrays write in large chunks, gulping multiple megabytes at times unnecessarily. The three-layer abstraction model implemented by the HP 3PAR Operating System can effectively utilize flash and any underlying media type. This means that HP 3PAR StoreServ Storage is able to make the most efficient use of SSDs by sipping on capacity. When we look at wide striping, you will see how the application of this tenet load balances across all SSDs to enable high performance and prolong flash-based media lifespan.

 Next let’s look at how the application of these tenets can help make a superior flash array

  • Mesh-Active Clustered Systems: This allows you to start with a small array (4 controllers for example) and grow your arrays non-disruptively as your demand grows (8 controllers for example). Mesh-active clusters also allow all storage capacity to be accessed by multiple storage controllers symmetrically so that there is even performance across all controllers.
  • System-wide striping: As a concept, wide striping allows data to be spread across multiple drives so as to maximize the performance of multiple disk drives. Much like adding more cylinders to a combustion engine. However, recall that in all-flash systems, the controller performance rather than the number of disks limits efficiency. System-wide striping allows for increased performance by wide striping across all controllers, host ports and other resources in a mesh-active cluster, not just disks.
  • Mixed workload support: To effectively utilize the millions of input-output operations per second (IOPS) that a flash array typically provides, you must be able to consolidate multiple applications to share the same array. Conventional wisdom today mandates separate arrays for say short transaction workloads vs long queries. Mixed workload support on an HP 3PAR flash array challenges this convention and uses the ASIC and the mesh-active cluster to redirect conflicting workloads. So you can effectively consolidate many applications on a single array and drive a higher return on your investment.

If this short tour of the 3PAR architecture inspires you, then I highly encourage you to take a look at these two technical white papers that go into a lot more detail on this topic:

In the meantime, I’m returning to the sand, the sun and my ice-cold pineapple rum for a little while longer.

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